Research and Project Grants
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PI, Title: Design and Implementation of Secure Embedded System for Remote
Monitored
Implantable Medical Devices
Funding agency: Ministry of Electronics and Information Technology (MeitY), Govt. of India
Summary: Implantable Medical Device (IMD) is the device to give support to efficient medical treatments. With the remotely monitored IMDs being prevalent today, all of the patient’s data is readily available on these devices and is accessible over the internet. Also, the wireless connectivity can be exploited to compromise the security of IMDs and bring serious risk to the patient’s life when an adversary tampers with the data that is being transferred over the channel. This project aims to prevent the unauthorized access to IMDs that could endanger the patient’s life, and the final goal is to design and implement FPGA prototype (as well as ASIC chip) for memory and power aware secure IMDs
Status: Ongoing (2020–2023)
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PI, Title: Cryptanalysis of Cryptographic Ciphers with emphasis on AES and RSA
Funding agency: Ministry of Electronics and Information Technology (MeitY), Govt. of India
Summary: Under this project practical attacks have been studied and implemented for AES-128 and RSA. Cryptanalysis of reduced round (five to six rounds) of AES-128 has been targeted by employing variants of differential or impossible-differential cryptanalysis with improved time-memory trade-off. For cryptanalysis of RSA, this project aims at factoring 600–700 bit RSA moduli on fine tuning the number field sieve method (NFSM) and massive parallelization of all its stages so as to make the computation doable within a practical time span.
Status: Ongoing (2017–2020, extended to 2021)
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PI, Title: Design and Implementation of Fault Attack Resilient Encryption for
Secure Communication
Funding agency: ISRO
Summary: This project aims to design symmetric cipher, specifically Block Ciphers that are resistant to existing popular attacks. Efficient hardware implementation on FPGA platform is also targeted for the newly proposed ciphers.
Status: Ongoing (from 2019 - 2021)
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PI, Title: Indigenous Authenticated Encryption for Satellite Communication
Funding agency: ISRO
Summary: This project proposed a new authenticated encryption scheme based on counter mode of operation using cellular automata (CA). The simple and regular structure of the CA along with the good random evolution properties is exploited to overcome the limitations of the existing Attacks on AES-GCM. The light weight AE scheme is also implemented on FPGA platform.
Status: completed (2017- May 2019)
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PI, Title: Design of Scalable Parameterized Stream Cipher suitable for both
Software and Hardware
Funding agency: ISRO
Summary: This project aims to design Stream cipher using Cellular Automata which overcomes the cryptographic limitation of standard eStream ciphers and well suited both for software and hardware.
Status: Completed in 2016
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PI, Title: Design of an Integrated Scheme for Error Correction and Message
Authentication
Funding agency: ISRO, SAC Ahmedabad, India
Summary: This project design a new integrated scheme for Authentication and Error Correction. The design is implemented on FPGA.
Status: Completed in 2014
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Co-PI, Title: Design and efficient implementation of advanced encryption and
decryption techniques for use in spacecraft communications
Funding agency: ISRO
Summary: Identifying the needs and the limitations of data-security applications in the context of spacecraft communications, tuning and/or designing algorithms for encryption, decryption and digital signatures, assessment of the security of the new cryptographic schemes, efficient implementations of the new schemes
Status: Running (from 2013)
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PI, Title: Encompression – Encryption in Compressed Domain, SAC Ahmedabad, India
Funding agency: ISRO
Summary: This project aims to design new integrated scheme for Encryption and Compression for Audio data
Status: Completed in 2013
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Co-PI, Title: Investigation of cryptanalytic techniques
Funding agency: HQIDS, MoD, GoI
Summary: This project deals with the study of cryptanalytic techniques for known ciphers. It covers both symmetric and asymmetric ciphers. Research will be focused on efficient modifications and implementations of known algorithms and also on the development of new algorithms. The most important areas covered will include the following: Parallelization issues for sieving and linear system solving stages for modern public-key algorithms, algebraic and other recently proposed attacks on symmetric-key block ciphers.
Status: Completed in 2013
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PI, Title: High Speed End-to-end ASIC Design of AES Rijndael Cryptosystem
Funding agency: ISRO, India
Summary: Power efficient AES-128 has been implemented on FPGA.
Status: Completed in 2012
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PI, Title: Design and analysis of an efficient cryptosystem for safety messaging
over vehicular networks
Funding agency: GM India Science Lab, Bangalore
Summary: One of the current-day challenges of vehicular networks is to make the communication secure for a variety of applications, particularly the applications related to safety. The project deals with: Design of efficient and scalable security mechanisms with low complexity to provide security service for source authentication and privacy/anonymity, investigating threats against the proposed security mechanisms, provision of safeguards against threats, analysis of vulnerabilities in the proposed safeguards.
Status: Completed in 2012
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PI, Title: Software Tools for Cryptanalysis of Stream Cipher
Funding agency: SAG, DRDO, New Delhi, India
Summary: This project develops two software tools for algebraic cryptanalysis of Stream Cipher, one using Grobner Basis and another using Cube attack.
Status: Completed (2010–2012)
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PI, Title: Design of an Indigenous Encryption Algorithm for SDA-16
Funding agency: ITI, Bangalore, India
Summary: Indigenous Encryption Algorithm has been designed and implemented on FPGA.
Status: Completed (2007–2010)
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Co-PI, Title: Design and implementation of cryptosystems resistant to
vulnerabilities and side channel attacks
Funding agency: Department of Information Technology (DIT), Govt. of India
Summary: Under this project a number of side channel attacks have been studied and implemented. Set-up has been developed for Differential Power Analysis attack, software was developed to carry out DPA analysis and has been implemented on FPGA. DPA on DES, 3-DES, AES, and RSA have been performed successfully.
Status: Completed (2005–2008)
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Co-PI, Title: Design of an IP core for a digital signal processor (DSP) with
essential functionalities.
Funding agency: ISRO, India
Status: Completed (2010–2012)
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Co-PI, Title: Testing of core based systems
Funding agency: Agere Systems, USA
Status: Completed in 2000