VLSI Testing and On-line Monitoring
1.
Design of ICs with compliance to Digital and Mixed Signal DFT standards.
2.
Design of Digital ICs with on-chip detector for real-time fault detection during chip operation.
3.
Design of a novel scheme for PLL BIST
© 2015 Department of Electrical Engineering, IIT Kharagpur
Designed and Maintained by Arabinda Das.